Integrated Circuit Data

Description

An experiment on integrated circuits was reported by Phadke et al. (1983). The width of lines made by a photoresist-nanoline tool were measured in five different locations on silicon wafers, measurements being taken before and after an etching process being treated separately. Here, the pre-etching data are analyzed. The eight experimental factors (A-H) were arranged in an L18 orthogonal array and produced 33 measurements at each of five locations, giving a total of 165 observations. There were no whole-plot (i.e. between-wafer) factors.

Usage

data("circuit")

Format

A data frame with 165 observations on the following 13 variables.

Width

width of lines made by a photoresist-nanoline tool

A

a factor A with levels 1, 2 and 3

B

a factor B with levels 1, 2 and 3

C

a factor C with levels 1, 2 and 3

D

a factor D with levels 1, 2 and 3

E

a factor E with levels 1, 2 and 3

F

a factor F with levels 1, 2 and 3

G

a factor G with levels 1, 2 and 3

H

a factor H with levels 1, 2 and 3

I

a factor I with levels 1, 2 and 3

Wafer

wafers indenfifier

waf

replication number for two replicates

exp

experiment number for differenct array

References

Phadke, M.S., Kacka, R.N., Speeney, D.V. and Grieco, M.J. (1983). Off-line quality control for integrated circuit fabrication using experimental design. Bell System Technical Journal, 62, 1273–1309.

Results